gNBX - reconfigurable hardware acceleration of self-organizing maps

Pohl C, Franzmeier M, Porrmann M, Rückert U. gNBX - reconfigurable hardware acceleration of self-organizing maps. In: IEEE Electron Devices Society, School of Information Technology and Electrical Engineering, eds. Field-Programmable Technology, 2004. Proceedings. 2004 IEEE International Conference on. Piscataway, NJ: IEEE; 2004: 97-104.In this paper a new FPGA based hardware accelerator (gNBX) for Se(f-Organizing Maps is introduced. New principles for hardware acceleration of Self-Organizing Maps, which increase the degree of paralleliry arid therefore the acceleration gain will be presented. Our technology independent design description can be mapped on application specific integrated circuits if very high performance is required, as well as on Field Programmable Gate Arrays (FPGAS). which offer mid level performance (a speed up factor of up to 70 in comparison with PCs for t)pical datasets is achieved) at relativly low costs. Additional),, FPGAs offer the jlexibility to adapt the hardware to the changing requirements of the application during runtime. Therefore, the hardware can be exploited optimally at all times during the simulati011 process. Several benchmark scenarios with well known datasets will show rheperforniance of our system