Dreesen R, Jungeblut T, Thies M, Kastens U. Dependence Analysis of VLIW Code for Non-Interlocked Pipelines. In: Proceedings of the 8th Workshop on Optimizations for DSP and Embedded Systems. 2010.Data dependence analysis (DDA) on assembly code is a frequent problem in compilers and program analysis tools. The fundamentals of a DDA on code for simple processors are well understood. We propose a DDA method, that is applicable for a wider range of processors. This includes VLIW processors and processors with delayed branches and delayed register accesses. For these architectures, the instruction order may no longer match the order of register accesses, which necessitates a new analysis technique. The result of our analysis method is an instru...
This paper describes a method of analysis for detecting and minimizing memory latency using a direct...
he compiler tool Unison uses combinatorial optimisation to perform integrated register allocation an...
Instruction scheduling aims to reorder instructions in such a way that it covers the delay between a...
One of the main problems that prevent extensive use of VLIW architectures for non-numeric programs i...
Determination of data dependences is a task typically per-formed with high-level language source cod...
International audienceCritical applications require reliable processors that combine performance wit...
International audienceThis article treats register constraints in high performance codes and embedde...
Predicated Execution has been put forth as a method for improving processor performance by removing ...
The performance of VLIW architectures is dependent on the capability of the compiler to detect and e...
Very long instruction word (VLIW) machines potentially provide the most direct way to exploit Instru...
International audienceIntegrating register allocation and software pipelining of loops is an active ...
results for an unlimited number of processors. Upper and lower bounds of the inherent parallelism, f...
The automatic and implicit transformation of sequential instruction streams, which execute efficient...
Finding parallelism that exists in a software program depends a great deal on determining the depend...
Very Long Instruction Word (VLIW) application specific processors represent an attractive solution f...
This paper describes a method of analysis for detecting and minimizing memory latency using a direct...
he compiler tool Unison uses combinatorial optimisation to perform integrated register allocation an...
Instruction scheduling aims to reorder instructions in such a way that it covers the delay between a...
One of the main problems that prevent extensive use of VLIW architectures for non-numeric programs i...
Determination of data dependences is a task typically per-formed with high-level language source cod...
International audienceCritical applications require reliable processors that combine performance wit...
International audienceThis article treats register constraints in high performance codes and embedde...
Predicated Execution has been put forth as a method for improving processor performance by removing ...
The performance of VLIW architectures is dependent on the capability of the compiler to detect and e...
Very long instruction word (VLIW) machines potentially provide the most direct way to exploit Instru...
International audienceIntegrating register allocation and software pipelining of loops is an active ...
results for an unlimited number of processors. Upper and lower bounds of the inherent parallelism, f...
The automatic and implicit transformation of sequential instruction streams, which execute efficient...
Finding parallelism that exists in a software program depends a great deal on determining the depend...
Very Long Instruction Word (VLIW) application specific processors represent an attractive solution f...
This paper describes a method of analysis for detecting and minimizing memory latency using a direct...
he compiler tool Unison uses combinatorial optimisation to perform integrated register allocation an...
Instruction scheduling aims to reorder instructions in such a way that it covers the delay between a...