Conference of 20th IEEE International On-Line Testing Symposium, IOLTS 2014 ; Conference Date: 7 July 2014 Through 9 July 2014; Conference Code:107097International audienceIn-situ slack-time monitoring may be used to enable ambitious power management policies under circuit wear-out and dynamic temperature and supply voltage variations. Given a limited hardware budget, it becomes crucial to be able to select the most appropriate places for in-situ slack-time monitoring. Here, two metrics are proposed to guide the selection of a set of flip-flops (FFs) for in-situ slack-time monitoring. The goal of these metrics is to maximize the ratio of clock cycles with at least one monitor activated and the number of activated monitors per clock cycle. T...
Tracking the gradual effect of silicon aging requires fine-grain slack monitoring. Conventional slac...
Reliability, power consumption and timing performance are key concerns for today's integrated circui...
\u3cp\u3eIn-situ delay monitoring is an advanced technique to monitor the robustness of digital circ...
Conference of 20th IEEE International On-Line Testing Symposium, IOLTS 2014 ; Conference Date: 7 Jul...
Slack-time reduction is a way to improve the performance of synchronous sequential circuits. In the ...
Abstract—In situ monitoring is an accurate way to monitor circuit delay or timing slack, but usually...
Abstract—In situ monitoring is an accurate way to monitor circuit delay or timing slack, but usually...
International audiencePVT information is mandatory to control specific knobs to compen-sate the vari...
International audiencePVT monitors are mandatory to use tunable knobs designed to compensate the var...
International audienceTo compensate the variability effects in advanced technologies, Process, Volta...
International audienceTo deal with variations, statistical methodologies can be completed by monitor...
Conference of 19th IEEE European Test Symposium, ETS 2014 ; Conference Date: 26 May 2014 Through 30 ...
There is much focus on timing error resilience for the speed critical paths of processors. In the co...
Interconnection reliability threats dependability of highly critical electronic systems. One of most...
Tracking the gradual effect of silicon aging requires fine-grain slack monitoring. Conventional slac...
Reliability, power consumption and timing performance are key concerns for today's integrated circui...
\u3cp\u3eIn-situ delay monitoring is an advanced technique to monitor the robustness of digital circ...
Conference of 20th IEEE International On-Line Testing Symposium, IOLTS 2014 ; Conference Date: 7 Jul...
Slack-time reduction is a way to improve the performance of synchronous sequential circuits. In the ...
Abstract—In situ monitoring is an accurate way to monitor circuit delay or timing slack, but usually...
Abstract—In situ monitoring is an accurate way to monitor circuit delay or timing slack, but usually...
International audiencePVT information is mandatory to control specific knobs to compen-sate the vari...
International audiencePVT monitors are mandatory to use tunable knobs designed to compensate the var...
International audienceTo compensate the variability effects in advanced technologies, Process, Volta...
International audienceTo deal with variations, statistical methodologies can be completed by monitor...
Conference of 19th IEEE European Test Symposium, ETS 2014 ; Conference Date: 26 May 2014 Through 30 ...
There is much focus on timing error resilience for the speed critical paths of processors. In the co...
Interconnection reliability threats dependability of highly critical electronic systems. One of most...
Tracking the gradual effect of silicon aging requires fine-grain slack monitoring. Conventional slac...
Reliability, power consumption and timing performance are key concerns for today's integrated circui...
\u3cp\u3eIn-situ delay monitoring is an advanced technique to monitor the robustness of digital circ...