Non-Alloyed Ohmic Contacts on GaAs Using Metal-Interlayer-Semiconductor Structure With SF6 Plasma Treatment

We demonstrate the effect of SF6 plasma passivation with a ZnO interlayer in a metal-interlayer-semiconductor (MIS) structure to reduce source/drain (S/D) contact resistance. The interface trap states and the metal-induced gap states causing the Fermi-level pinning problem are effectively alleviated by passivating the GaAs surface with SF6 plasma treatment and inserting a thin ZnO interlayer, respectively. Specific contact resistivity exhibits similar to 10(4) x reduction when the GaAs surface is treated with SF6 plasma, followed by ZnO interlayer deposition, compared with the Ti/n-GaAs (similar to 2x10(18) cm(-3)) S/D contact. This result proposes the promising non-alloyed S/D ohmic contact for III-V semiconductor-based transistors.This work was supported in part by the Technology Innovation Program within the Ministry of Trade, Industry and Energy, Korea, under Grant 10052804 and in part by the Basic Science Research Program within the Ministry of Science, ICT, and Future Planning through the National Research Foundation of Korea under Grant 2014R1A1A1036090