Partial Dynamic Reconfiguration in a Multi-FPGA Clustered Architecture Based on Linux

Rana V, Santambrogio M, Sciuto D, et al. Partial Dynamic Reconfiguration in a Multi-FPGA Clustered Architecture Based on Linux. In: IEEE Computer Society. Technical Committee on Parallel Processing, Institute of Electrical and Electronics Engineers. Technical Committee on Parallel Processing, eds. Proceedings of the 21st International Parallel and Distributed Processing Symposium (IPDPS 2007) - Reconfigurable Architecture Workshop (RAW), IEEE Computer Society. Piscataway, NJ: IEEE; 2007.Dynamically reconfigurable hardware allows for implementing systems that can be adapted at run-time according to the needs of the user. This paper presents an architecture that is composed of multiple FPGAs that are connected to an embedded processor. Thus, the architecture is referred to as a Multi-FPGA Clustered Architecture (MFCA). All FPGAs can be partially and dynamically reconfigured to integrate user-defined IPCores into the system at run-time. For the resource management and communication management we have implemented a Linux Operating System on the embedded processor that can be used to control the reconfiguration of the FPGAs by means of simple function calls. Furthermore, the Linux OS completely hides the physical infrastructure of the MFCA from user applications, offering a consistent interface to utilize partial reconfiguration