A Dynamically Reconfigurable Hardware Accelerator for Self-Organizing Feature Maps

Porrmann M, Kalte H, Witkowski U, Niemann J-C, Rückert U. A Dynamically Reconfigurable Hardware Accelerator for Self-Organizing Feature Maps. In: Proceedings of The 5th World Multi-Conference on Systemics, Cybernetics and Informatics, SCI 2001. Vol 3. Orlando, Florida, USA; 2001: 242-247.A hardware accelerator for self-organizing feature maps is presented. The system is based on the universal rapid prototyping system RAPTOR2000 that has been developed by the authors. The prototyping system consists of a motherboard and up to six application specific modules. The motherboard provides the necessary communication infrastructure for the application specific functionality that is implented on the modules. RAPTOR2000 is linked to its host - a standard personal computer or workstation - via PCI bus. For the simulation of self-organizing maps a module has been disigned for the RAPTOR2000 system, that embodies an FPGA of the Xilinx Virtex series and optionally up to 128 MBytes of SDRAM. A speed-up of about 60 is achieved with five FPGA modules on the RAPTOR2000 system compared to a software implementation on a state of the art personal computer for typical applications of self-organizing maps