International audienceThis paper proposes a new architecture of a time-to-digital converter (TDC) based on a self-timed ring (STR) oscillator with sub-gate delay resolution. The proposed TDC can virtually achieve as fine as desired time resolution by simply increasing its number of stages thanks to the STR unique features. Exploiting the phase difference between events propagating in the same STR without collision, this TDC benefit from a uniform phase distribution. Thus, under certain conditions, a regular time base can be generated and a compact readout algorithm can be applied. Moreover, the proposed technique allows on-the-fly time measurement on fast non-periodic signals. As a proof-of-concept, an STR-based TDC with only 9-stages has b...
This paper investigates the idea to construct Time-to-Digital Converter (TDC) circuits based on dyna...
In this work, an improved Current-Mode-Logic-based (CML) ring oscillator is designed for use in an ...
We have designed, fabricated and tested a time-to-digital converter (TDC) using SFQ logic circuits. ...
International audienceA new fully digital high resolution time-to-digital converter (TDC) based on a...
International audienceA new high resolution time-to-digital converter (TDC) based on a self-timed ri...
International audienceThis paper presents an ASIC test chip designed and fabricated in 0.35μm CMO...
Time-to-digital converters (TDCs) have become unavoidable in systems incorporatinghigh precision tim...
We have designed, fabricated and tested a time-to-digital converter (TDC) using SFQ logic circuits. ...
To characterize an on-chip programmable delay in a low-cost and high-resolution manner, a built-in s...
This paper presents a time-to-digital converter (TDC) architecture capable of reaching high-precisio...
Aggressive scaling of CMOS technology into deep sub-micron nodes enables analog front-end circuitrie...
An integrated circuit that measures time intervals with high precision and accuracy has a wide range...
International audienceA high-speed multi-phase oscillator based on self-timed ring is proposed. Self...
Over the past few decades, the advancement in the deep-submicron CMOS process technology has dramati...
ISBN 978-1-61284-646-0International audienceSelf-timed rings (STR) are promising approach for design...
This paper investigates the idea to construct Time-to-Digital Converter (TDC) circuits based on dyna...
In this work, an improved Current-Mode-Logic-based (CML) ring oscillator is designed for use in an ...
We have designed, fabricated and tested a time-to-digital converter (TDC) using SFQ logic circuits. ...
International audienceA new fully digital high resolution time-to-digital converter (TDC) based on a...
International audienceA new high resolution time-to-digital converter (TDC) based on a self-timed ri...
International audienceThis paper presents an ASIC test chip designed and fabricated in 0.35μm CMO...
Time-to-digital converters (TDCs) have become unavoidable in systems incorporatinghigh precision tim...
We have designed, fabricated and tested a time-to-digital converter (TDC) using SFQ logic circuits. ...
To characterize an on-chip programmable delay in a low-cost and high-resolution manner, a built-in s...
This paper presents a time-to-digital converter (TDC) architecture capable of reaching high-precisio...
Aggressive scaling of CMOS technology into deep sub-micron nodes enables analog front-end circuitrie...
An integrated circuit that measures time intervals with high precision and accuracy has a wide range...
International audienceA high-speed multi-phase oscillator based on self-timed ring is proposed. Self...
Over the past few decades, the advancement in the deep-submicron CMOS process technology has dramati...
ISBN 978-1-61284-646-0International audienceSelf-timed rings (STR) are promising approach for design...
This paper investigates the idea to construct Time-to-Digital Converter (TDC) circuits based on dyna...
In this work, an improved Current-Mode-Logic-based (CML) ring oscillator is designed for use in an ...
We have designed, fabricated and tested a time-to-digital converter (TDC) using SFQ logic circuits. ...