An ultra-low-power voltage-mode asynchronous WTA-LTA circuit

This paper presents an asynchronous mixed-signal WTA-LTA circuit conceived to carry out local minimummaximum indexing in massively parallel image processing arrays. The hardware is focused on energy-efficient operation. We describe a realization for the standard CMOS base process of a commercial 3-D TSV stack featuring a power consumption of only 20pW per elementary cell at 30fps. The proposed block is also capable of resolving small voltage differences without requiring any external reference. This leads to a hit percentage greater than 90% even when taking into account global process variations and mismatch conditions.MINECO TEC2012-38921-C02-01Fondo Europeo de Desarrollo Regional IPT-2011-1625- 430000 IPC-2011100