A fault-tolerant adaptive wormhole routing function for Networks-on-Chips (NoCs) is presented. The novelty of this routing logic is that it is capable of using runtime information on availability of links to dynamically bypass faulty channels. When faults occur, no offline reconfiguration or dropping of packets is necessary. Instead, dynamic routes are suggested on-the-fly. Routing decisions are based only on local knowledge, which allows for fast switching. Our approach does not use any costly virtual channels. As we do not prohibit cyclic dependencies, the routing function provides minimal routing from source to destination even in the presence of faults. We have implemented the architecture design using synthesizable HDL. Using simulatio...
The aggressive semiconductor technology scaling provides the means for doubling the amount of transi...
The aggressive semiconductor technology scaling provides the means for doubling the amount of transi...
Due to the faults in system fabrication and run time, designing an efficient fault-tolerant routing ...
A fault-tolerant adaptive wormhole routing function for Networks-on-Chips (NoCs) is presented. The n...
A fault-tolerant adaptive wormhole routing function for Networks-on-Chips (NoCs) is presented. The n...
A fault-tolerant adaptive wormhole routing function for Networks-on-Chips (NoCs) is presented. The n...
A fault-tolerant adaptive wormhole routing function for Networks-on-Chips (NoCs) is presented. The n...
A novel fault-tolerant adaptive wormhole routing function for Networks-on-Chips (NoCs) is presented....
In this paper we propose a distributed routing algorithm for networks-on-chip (NoCs) that can dynami...
International audienceNetworks-on-Chips (NoCs) are considered to be the paradigm of choice for on-ch...
In this work, we propose a fault-tolerant framework for Network on Chips (NoC) to achieve maximum pe...
Downscaled complementary metal-oxide semiconductor (CMOS) technology feature sizes have enabled mass...
International audienceA fault-tolerant routing algorithm in Network-on-Chip (NoC) architectures prov...
A fault-tolerant routing algorithm in Network-on-Chip (NoC) architectures provides adaptivity for on...
A fault-tolerant routing algorithm in Network-on-Chip (NoC) architectures provides adaptivity for on...
The aggressive semiconductor technology scaling provides the means for doubling the amount of transi...
The aggressive semiconductor technology scaling provides the means for doubling the amount of transi...
Due to the faults in system fabrication and run time, designing an efficient fault-tolerant routing ...
A fault-tolerant adaptive wormhole routing function for Networks-on-Chips (NoCs) is presented. The n...
A fault-tolerant adaptive wormhole routing function for Networks-on-Chips (NoCs) is presented. The n...
A fault-tolerant adaptive wormhole routing function for Networks-on-Chips (NoCs) is presented. The n...
A fault-tolerant adaptive wormhole routing function for Networks-on-Chips (NoCs) is presented. The n...
A novel fault-tolerant adaptive wormhole routing function for Networks-on-Chips (NoCs) is presented....
In this paper we propose a distributed routing algorithm for networks-on-chip (NoCs) that can dynami...
International audienceNetworks-on-Chips (NoCs) are considered to be the paradigm of choice for on-ch...
In this work, we propose a fault-tolerant framework for Network on Chips (NoC) to achieve maximum pe...
Downscaled complementary metal-oxide semiconductor (CMOS) technology feature sizes have enabled mass...
International audienceA fault-tolerant routing algorithm in Network-on-Chip (NoC) architectures prov...
A fault-tolerant routing algorithm in Network-on-Chip (NoC) architectures provides adaptivity for on...
A fault-tolerant routing algorithm in Network-on-Chip (NoC) architectures provides adaptivity for on...
The aggressive semiconductor technology scaling provides the means for doubling the amount of transi...
The aggressive semiconductor technology scaling provides the means for doubling the amount of transi...
Due to the faults in system fabrication and run time, designing an efficient fault-tolerant routing ...