Tunnel Field Effect Transistor has proved to be an inexpensive electronic device in the application of low power VLSI Design systems owing to its low operational voltages, high ION/IOFF ratio and very steep sub-threshold slope. However, due to their typical requirements of degenerate doping concentrations and sharp doping gradient profiles at the junctions, TFETs pose difficulties like Random Dopant Fluctuations (RDFs), increased process complexity and raised thermal budget. In this thesis, a germanium gate-junctionless-hetero (GaAs-Ge) device structure, working on the principle of band-to-band tunneling mechanism, has been designed and simulated to exhibit sensitivity to near-infrared (NIR) wavelengths (1–1.5 μm). Therefore the device can ...
The reduction of power consumption is a crucial aspect of the design of submicron logic circuits, wh...
This paper investigates the role of a hetero-junction p-i-n gate all around tunnel FET architecture ...
This work presents simulation study and analysis of nanoscale III-V Heterojunction Gate All Around ...
In recent years, scaling down the dimensions of electronic devices has driven dramatic improvements ...
In this thesis we mainly focus on silicon germanium based gate normal tunnel field effect transistor...
The device model of the modulation doped heterostructure is established in Agilent advanced design s...
A significant rise in the mass production of products that contain nanoparticles is of growing conce...
In this work we present the results of a systematic study about SI GaAs detectors as a function of s...
In this paper, gate-all-around (GAA) tunneling field-effect transistors (TFETs) with hetero-gate die...
The term "near infrared" or NIR is most commonly used with reference to a wavelength spectral range ...
The steady scaling-down of semiconductor device for improving performance has been the most importan...
For the past decades, down-scaling of metal-oxide-semiconductor field-effect-transistors (MOSFET) de...
In order to improve the energy efficiency of next generation digital systems, transistors with Subth...
Two-dimensional (2D) transition metal dichalcogenides (TMDs) are a class of stable, atomically-thin ...
AbstractIn this paper, a high sensitivity photosensor is proposed that utilizes the Zinc Oxide (meta...
The reduction of power consumption is a crucial aspect of the design of submicron logic circuits, wh...
This paper investigates the role of a hetero-junction p-i-n gate all around tunnel FET architecture ...
This work presents simulation study and analysis of nanoscale III-V Heterojunction Gate All Around ...
In recent years, scaling down the dimensions of electronic devices has driven dramatic improvements ...
In this thesis we mainly focus on silicon germanium based gate normal tunnel field effect transistor...
The device model of the modulation doped heterostructure is established in Agilent advanced design s...
A significant rise in the mass production of products that contain nanoparticles is of growing conce...
In this work we present the results of a systematic study about SI GaAs detectors as a function of s...
In this paper, gate-all-around (GAA) tunneling field-effect transistors (TFETs) with hetero-gate die...
The term "near infrared" or NIR is most commonly used with reference to a wavelength spectral range ...
The steady scaling-down of semiconductor device for improving performance has been the most importan...
For the past decades, down-scaling of metal-oxide-semiconductor field-effect-transistors (MOSFET) de...
In order to improve the energy efficiency of next generation digital systems, transistors with Subth...
Two-dimensional (2D) transition metal dichalcogenides (TMDs) are a class of stable, atomically-thin ...
AbstractIn this paper, a high sensitivity photosensor is proposed that utilizes the Zinc Oxide (meta...
The reduction of power consumption is a crucial aspect of the design of submicron logic circuits, wh...
This paper investigates the role of a hetero-junction p-i-n gate all around tunnel FET architecture ...
This work presents simulation study and analysis of nanoscale III-V Heterojunction Gate All Around ...