Effects of using asymmetric channel thickness in tunneling field-effect transistors (TFET) are investigated in sub-50 nm channel regime using two-dimensional (2D) simulations. As the thickness of the source side becomes narrower in narrow-source wide-drain (NSWD) TFETs, the threshold voltage (V th) and the subthreshold swing (SS) decrease due to enhanced gate controllability of the source side. The narrow source thickness can make the band-to-band tunneling (BTBT) distance shorter and induce much higher electric field near the source junction at the on-state condition. In contrast, in a TFET with wide-source narrow-drain (WSND), the SS shows almost constant values and the V th slightly increases with narrowing thickness of the drain side. I...
We performed 3D simulations to demonstrate structural effects in sub-20 nm gate-all-around silicon n...
This paper analyzes the subthreshold swing in asymmetric double gate MOSFETs with sub-20 nm channel ...
In this letter, we systematically investigate the impact of gate length and channel orientation on t...
In this paper, using calibrated TCAD simulations, we demonstrate how the performance of a Tunneling ...
With the scaling of MOSFET devices down to the sub-10 nm regime, there has been an active search for...
The Tunnel Field Effect Transistor (TFET) with sub-60mV/decade Sub-threshold slope and extremely hig...
Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Comp...
The conventional metal oxide semiconductor field effect transistor (MOSFET)may not be suitable for f...
As the conventional metal oxide semiconductor field-effect transistor (MOSFET) keep scaling down to ...
Abstract—In this paper, two competing mechanisms determining drain current of tunneling field-effect...
478-485This paper investigates a hetero-junction vertical t-shape tunnel field effect transistor and...
The Tunnel-FET (TFET) device is a gated reverse biased p-i-n junction whose working principle is bas...
The influence of structural parameters, including the Schottky barrier height for electron (Bn) and ...
In this letter, we systematically investigate the impact of gate length and channel orientation on t...
Over 40 years of scaling dimensions for new and continuing product cycles has introduced new challen...
We performed 3D simulations to demonstrate structural effects in sub-20 nm gate-all-around silicon n...
This paper analyzes the subthreshold swing in asymmetric double gate MOSFETs with sub-20 nm channel ...
In this letter, we systematically investigate the impact of gate length and channel orientation on t...
In this paper, using calibrated TCAD simulations, we demonstrate how the performance of a Tunneling ...
With the scaling of MOSFET devices down to the sub-10 nm regime, there has been an active search for...
The Tunnel Field Effect Transistor (TFET) with sub-60mV/decade Sub-threshold slope and extremely hig...
Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Comp...
The conventional metal oxide semiconductor field effect transistor (MOSFET)may not be suitable for f...
As the conventional metal oxide semiconductor field-effect transistor (MOSFET) keep scaling down to ...
Abstract—In this paper, two competing mechanisms determining drain current of tunneling field-effect...
478-485This paper investigates a hetero-junction vertical t-shape tunnel field effect transistor and...
The Tunnel-FET (TFET) device is a gated reverse biased p-i-n junction whose working principle is bas...
The influence of structural parameters, including the Schottky barrier height for electron (Bn) and ...
In this letter, we systematically investigate the impact of gate length and channel orientation on t...
Over 40 years of scaling dimensions for new and continuing product cycles has introduced new challen...
We performed 3D simulations to demonstrate structural effects in sub-20 nm gate-all-around silicon n...
This paper analyzes the subthreshold swing in asymmetric double gate MOSFETs with sub-20 nm channel ...
In this letter, we systematically investigate the impact of gate length and channel orientation on t...