A 10GHz analog phase interpolator based on a novel quadrature clock generator

A 10GHz analog phase interpolator (PI) in Global Foundry 65nm CMOS technology has been presented. The PI mainly consists of the quadrature clock generator (QCG) and the phase Mixer. Different from the traditional divider, the QCG produces 4-phase clocks without reducing the clock frequency. As a result, it reduces the frequency of PLL from 20GHz to 10GHz, which can largely save the power consumption of the clocking system. Compared with the traditional QCG, the proposed QCG achieves a lower output phase error and has a better tolerance of delay variation. With the delay changing from 18ps to 36ps, the output phase error of the proposed QCG keeps within +/- 4 degrees. Besides, the simulated worst phase step error of the phase Mixer is smaller than 0.2LSB. The whole phase interpolator has the worst phase step error smaller than 0.3LSB. The average power consumption of the QCG and the phase Mixer are 6.14mW and 4.14mW respectively, with a 1.2V supply voltage.National Natural Science Foundation of China [61376035]; Specialized Research Fund for the Doctoral Program of Higher Education [20130001110005]CPCI-S(ISTP)wgai@pku.edu.cn187-19