currently the DSP applications such as multimedia processing raise the demands to IC designers for more flexibility, higher performance and shorter time-to-market. To solve these problems, this paper proposed a novel reconfigurable operator based IC design methodology for multimedia applications. Four kinds of reconfigurable operators and their logic meanings are introduced in this paper as well as the design flow. An archetypal reconfigurable circuit with 4(star)4 reconfigurable computing operator (reALU) is implemented in our research using SMIC 0.18um CMOS, achieving the performance 2.4GOPS at 150Mhz at 1.62v. Several algorithms such as SAD and DCT are mapped into the array processor, which show the better performance than the traditiona...
In this paper, a novel reconfigurable computing engine for digi-tal signal processing applications i...
In this paper, we propose a cost-effective reconfigurable accelerator for the platform-based system-...
International audienceIn multimedia applications, video and image processing is one of the challenge...
Currently the DSP applications such as multimedia processing raise the demands to IC designers for m...
Current IC design, especially that for multimedia processing, requires high performance and short de...
In this paper, a reconfigurable computing processor core for multimedia system-on-chip (SOC) applica...
Current approaches towards building a reconfigurable processor are targeted towards general purpose ...
By using an array processor methodology, a reconfigurable processor ReMAP architecture was proposed,...
Dynamically reconfigurable processors are attracting significant interest in the semiconductor indus...
As electronic circuits enter the domain of silicon nanoscale technology the usual design space adopt...
International audienceImage processing applications need embedded devices that can integrate evoluti...
A new reconfigurable architectural template is presented. Such a template is composed of coarse-grai...
Low power and high performance are the two most important criteria for many signal-processing system...
International audienceFor better performance and efficiency, high speed reconfigurable computation u...
In this paper, a novel reconfigurable computing engine for digi-tal signal processing applications i...
In this paper, we propose a cost-effective reconfigurable accelerator for the platform-based system-...
International audienceIn multimedia applications, video and image processing is one of the challenge...
Currently the DSP applications such as multimedia processing raise the demands to IC designers for m...
Current IC design, especially that for multimedia processing, requires high performance and short de...
In this paper, a reconfigurable computing processor core for multimedia system-on-chip (SOC) applica...
Current approaches towards building a reconfigurable processor are targeted towards general purpose ...
By using an array processor methodology, a reconfigurable processor ReMAP architecture was proposed,...
Dynamically reconfigurable processors are attracting significant interest in the semiconductor indus...
As electronic circuits enter the domain of silicon nanoscale technology the usual design space adopt...
International audienceImage processing applications need embedded devices that can integrate evoluti...
A new reconfigurable architectural template is presented. Such a template is composed of coarse-grai...
Low power and high performance are the two most important criteria for many signal-processing system...
International audienceFor better performance and efficiency, high speed reconfigurable computation u...
In this paper, a novel reconfigurable computing engine for digi-tal signal processing applications i...
In this paper, we propose a cost-effective reconfigurable accelerator for the platform-based system-...
International audienceIn multimedia applications, video and image processing is one of the challenge...