A 79kHz, 24ppm/��C, on-chip CMOS relaxation oscillator with a combination of pre-checking compensation and integral feedback

An on-chip CMOS relaxation oscillator employing a pre-checking compensation and integral feedback structure is proposed in this paper. The oscillator adopts a pre-checking scheme to eliminate the frequency variation caused by the comparator delay. Then the error caused by the comparators' offset voltage and the unquenched comparator-delay from the pre-checking mode are suppressed by the RC-integral feedback. The structure achieves effective suppression of the low-offset phase noise and frequency variation. This circuit dissipates 37uW in the 0.18um CMOS process and achieves a -70dBc/Hz phase-noise at 10Hz offset. It generates a 79kHz clock source with frequency variations of -0.2% ?? 0.03% for a supply voltage change from 0.9 to 1.1 V and -0.15% ?? 0.26% for a temperature change from -40 to 125??C. ? 2014 IEEE.EI