Add to ORKGWe report for the first time a thermally stable and high quality HfN/HfO2 gate stack for advanced CMOS applications. Due to the superior oxygen diffusion barrier of HfN as well as the thermal stability of HfN/HfO2 interface, the EOT of HfN/HfO2 gate stack has been successfully scaled down to less than 10A with excellent leakage, boron penetration immunity, and long-term reliability even after 1000??C RTA treatment for 20sec., without using surface nitridation prior to HfO 2 deposition. The mobility is improved significantly for devices without surface nitridation. Negligible change in both EOT and the work function of HfN/HfO2 gate stack are observed after 1000??C RTA.EI
In this paper field effect transistors (FETs) with new materials and new structures are discussed. A...
textAbstract – Studies have been done on the materials for alternative gate dielectrics (high-k) an...
textAggressive scaling of CMOS integrated circuits requires continuous miniaturization of the MOS t...
High quality thermal robust CVD-HfO2 gate dielectrics witli HfN electrodes were fabricated. The scal...
The material and electrical properties of HfO2 high-k gate dielectric are reported. In the first par...
High quality thermal robust CVD-HfO2 gate dielectrics with HfN electrodes were fabricated. The scala...
A novel replacement gate process employing a HfN dummy gate and sub-1-nm equivalent oxide thickness ...
High quality TaN/HfN/HfO2 gate stacks with 0.65 nm of the equivalent oxide thickness and 0.3 A/cm(2)...
Metal-oxide-semiconductor (MOS) devices using a thermally robust HfN/HfO2 gate stack were fabricated...
By using a high-temperature gate-first process, HfN-HfO2-gated nMOSFET with 0.95-nm equivalent oxide...
10.1109/ESSDER.2005.1546663Proceedings of ESSDERC 2005: 35th European Solid-State Device Research Co...
textThe aggressive scaling of Si integration technology requires the thinning of SiO2 gate oxide. H...
We show that multistep deposition cum two-step annealing, comprising an ultraviolet ozone (UVO) anne...
textAs the CMOS integrated circuits reduce to the 100-nanometer regime and beyond, the conventional...
textThe scaling of the device feature sizes has led the progress in MOS integrated circuit technolo...
In this paper field effect transistors (FETs) with new materials and new structures are discussed. A...
textAbstract – Studies have been done on the materials for alternative gate dielectrics (high-k) an...
textAggressive scaling of CMOS integrated circuits requires continuous miniaturization of the MOS t...
High quality thermal robust CVD-HfO2 gate dielectrics witli HfN electrodes were fabricated. The scal...
The material and electrical properties of HfO2 high-k gate dielectric are reported. In the first par...
High quality thermal robust CVD-HfO2 gate dielectrics with HfN electrodes were fabricated. The scala...
A novel replacement gate process employing a HfN dummy gate and sub-1-nm equivalent oxide thickness ...
High quality TaN/HfN/HfO2 gate stacks with 0.65 nm of the equivalent oxide thickness and 0.3 A/cm(2)...
Metal-oxide-semiconductor (MOS) devices using a thermally robust HfN/HfO2 gate stack were fabricated...
By using a high-temperature gate-first process, HfN-HfO2-gated nMOSFET with 0.95-nm equivalent oxide...
10.1109/ESSDER.2005.1546663Proceedings of ESSDERC 2005: 35th European Solid-State Device Research Co...
textThe aggressive scaling of Si integration technology requires the thinning of SiO2 gate oxide. H...
We show that multistep deposition cum two-step annealing, comprising an ultraviolet ozone (UVO) anne...
textAs the CMOS integrated circuits reduce to the 100-nanometer regime and beyond, the conventional...
textThe scaling of the device feature sizes has led the progress in MOS integrated circuit technolo...
In this paper field effect transistors (FETs) with new materials and new structures are discussed. A...
textAbstract – Studies have been done on the materials for alternative gate dielectrics (high-k) an...
textAggressive scaling of CMOS integrated circuits requires continuous miniaturization of the MOS t...