ReMAP: A reconfigurable array DSP architecture

Current IC design, especially that for multimedia processing, requires high performance and short development time. To satisfy these design requirements for an optimal time-to-market, a reconfigurable Array DSP architecture (ReMAP) with processing elements, memory, switch, and other components was proposed. Pipeline reconfiguration was introduced for performance improvement of applications. The antitype chip with 2??2 PEs was fabricated in SMIC 0.18 ??m CMOS, which contains 16 reALUs. Some common algorithms such as DCT and SAD were implemented in ReMAP. The result shows that the architecture can support high performance implementation of media processing.EI0116-202