A CMOS differential difference amplifier with reduced nonlinearity error of interpolation for interpolating ADCs

In this paper, the nonlinearity error induced by interpolation amplifier in interpolating analog-to-digital converters (ADCs) is analyzed, and a new differential difference amplifier (DDA) with well restrained nonlinearity error is presented. Its highly steady common-mode output voltage makes it especially suitable for differential interpolating ADCs. The amplifier is designed in a 0.35??m standard CMOS process with a single 3.3V supply. Simulated results show that this amplifier achieves a steady common-mode output in a wide common-mode input range from 0.85V to 2.45V without demanding complex circuitry. The amplifier settles in 4.8ns to an accuracy of 0.01% and dissipates a total power of 398.38??W. ?2006 IEEE.EI