A novel bus-based interconnection topology for small-scale multiprocessor system and SOC multiprocessor system

This paper presents a novel topology, partial-bus, as an alternative to traditional single/multiple shared bus. Through a discrete-time homogeneous Markov model which analytically calculates throughput, the research compares the performance of partial-bus with that of single/multiple bus. The performance comparison indicates that partial-bus may well be a good alternative to single/multiple bus for small scale and SOC multiprocessor systems. To ensure bus allocations of partial-bus is deadlock-free, a Petri-net based model is also introduced to formally describe bus occupation behaviors in partial-bus and verify the deadlock-free property.Computer Science, Artificial IntelligenceComputer Science, Interdisciplinary ApplicationsComputer Science, Theory & MethodsCPCI-S(ISTP)