Add to ORKGAs feature size shrinks, the dominant component of power consumption will be leakage. As caches represent a considerable fraction of area for many platforms, from embedded to highly paralleled systems, cache leakage control continues to become a critical issue. Drowsy cache technique is a state-preserving technique which reduces leakage by pulling down the voltages on selected lines. To exploit the temporal locality present in the data stream, existing drowsy cache policies update drowsy/active mode after an execution window of fixed clock cycles, which lack the flexibility to adapt to program behavior. We introduce a tri-mode FSM control policy, which exploits global Reuse Distance information and tries to keep a small set of lines in acti...
This paper compares the effectiveness of state-preserving and non-state-preserving techniques for le...
Leakage energy optimization for caches has been the target of much recent effort. In this work, we f...
Leakage power in data cache memories represents a sizable fraction of total power consumption, and m...
Technology projections indicate that static power will become a major concern in future generations ...
In the design of embedded systems, especially battery-powered systems, it is important to reduce ene...
On-chip caches represent a sizeable fraction of the total power consumption of microprocessors. Alth...
Leakage power in data cache memories represents a sizable fraction of total power consumption, and m...
In this paper, a technique to reduce the leakage power consumption in embedded drowsy instruction c...
We evaluate the leakage reduction for both instruction and data cache in presence of drowsy or decay...
Leakage power in cache memories represents a sizable fraction of total power consumption, and many t...
As technology scales down at an exponential rate, leakage power is fast becoming the dominant compon...
Abstract—With the reduction in feature size the static power component, such as the leakage power, d...
According to the International Technology Roadmap for Semiconductors (ITRS), the minimum feature siz...
Leakage power in data cache memories represents a sizable fraction of total power consumption, and m...
If current technology scaling trends hold, leakage power dissipation will soon become the dominant s...
This paper compares the effectiveness of state-preserving and non-state-preserving techniques for le...
Leakage energy optimization for caches has been the target of much recent effort. In this work, we f...
Leakage power in data cache memories represents a sizable fraction of total power consumption, and m...
Technology projections indicate that static power will become a major concern in future generations ...
In the design of embedded systems, especially battery-powered systems, it is important to reduce ene...
On-chip caches represent a sizeable fraction of the total power consumption of microprocessors. Alth...
Leakage power in data cache memories represents a sizable fraction of total power consumption, and m...
In this paper, a technique to reduce the leakage power consumption in embedded drowsy instruction c...
We evaluate the leakage reduction for both instruction and data cache in presence of drowsy or decay...
Leakage power in cache memories represents a sizable fraction of total power consumption, and many t...
As technology scales down at an exponential rate, leakage power is fast becoming the dominant compon...
Abstract—With the reduction in feature size the static power component, such as the leakage power, d...
According to the International Technology Roadmap for Semiconductors (ITRS), the minimum feature siz...
Leakage power in data cache memories represents a sizable fraction of total power consumption, and m...
If current technology scaling trends hold, leakage power dissipation will soon become the dominant s...
This paper compares the effectiveness of state-preserving and non-state-preserving techniques for le...
Leakage energy optimization for caches has been the target of much recent effort. In this work, we f...
Leakage power in data cache memories represents a sizable fraction of total power consumption, and m...