The impacts of three different strain configurations on both DC and RF performance of n-type silicon nanowire transistors (n-SNWTs) are investigated. It is found that the longitudinal tensile strain is the most efficient in improving the driving current and RF performance of n-SNWTs under the same stress value. In addition, the transverse compressive strain is also beneficial to the performance improvement, and can be combined in the stress engineering. Particularly, transverse biaxial compressive strain can effectively enhance the driving current, and at the same time slightly decrease the off-current of n-SNWT, which is beneficial for high speed and low power design. The results indicate that, due to the unique feature of gate-all-around ...
Mobility and strain effects in silicon nanowire MOSFETs are extensively studied by experiments. The ...
The performances of Ge-Si core-shell nanowire field effect transistors are evaluated based on a semi...
A 3-Dimensional (3D) strained Silicon Nanowire MOSFET simulation and inversion charge model are pres...
The impacts of three different strain configurations on both DC and RF performance of n-type silicon...
We present experimental results on on-current and transconductance gain and mobility enhancement in ...
This work demonstrates a method for incorporating strain in silicon nanowire gate-all-around (GAA) n...
The effects of high-level uniaxial tensile strain on the performance of gate-all-around (GAA) Si n-M...
In this paper, we calculate the surrounding strain effects owing to gate dielectric on the device pe...
Various non-ballistic effects have significant impacts on the characteristics of nanoscale devices w...
The design of silicon nanowire MOSFETs (SNWTs) for RF applications is discussed in this paper based ...
Today, state of the art MOSFETs feature effective gate lengths of only a few tens of nanometers push...
[[abstract]]The tensile strained Si, based on the misfit between Si and SiGe gives higher speed and ...
Nanowire transistors with triangular cross sections (TNWTs) are proposed and studied. Working mechan...
In this paper we investigate the electrical characteristics of a new structure of gate all around st...
A simulation study on the effects of different strain configurations on n-type III-V-based nanowire ...
Mobility and strain effects in silicon nanowire MOSFETs are extensively studied by experiments. The ...
The performances of Ge-Si core-shell nanowire field effect transistors are evaluated based on a semi...
A 3-Dimensional (3D) strained Silicon Nanowire MOSFET simulation and inversion charge model are pres...
The impacts of three different strain configurations on both DC and RF performance of n-type silicon...
We present experimental results on on-current and transconductance gain and mobility enhancement in ...
This work demonstrates a method for incorporating strain in silicon nanowire gate-all-around (GAA) n...
The effects of high-level uniaxial tensile strain on the performance of gate-all-around (GAA) Si n-M...
In this paper, we calculate the surrounding strain effects owing to gate dielectric on the device pe...
Various non-ballistic effects have significant impacts on the characteristics of nanoscale devices w...
The design of silicon nanowire MOSFETs (SNWTs) for RF applications is discussed in this paper based ...
Today, state of the art MOSFETs feature effective gate lengths of only a few tens of nanometers push...
[[abstract]]The tensile strained Si, based on the misfit between Si and SiGe gives higher speed and ...
Nanowire transistors with triangular cross sections (TNWTs) are proposed and studied. Working mechan...
In this paper we investigate the electrical characteristics of a new structure of gate all around st...
A simulation study on the effects of different strain configurations on n-type III-V-based nanowire ...
Mobility and strain effects in silicon nanowire MOSFETs are extensively studied by experiments. The ...
The performances of Ge-Si core-shell nanowire field effect transistors are evaluated based on a semi...
A 3-Dimensional (3D) strained Silicon Nanowire MOSFET simulation and inversion charge model are pres...