A 250MSPS 8-bit analog-to-digital converter based on 0.35m BiCMOS technology

An 8-bit 250MSPS flash A/D converter using 0.35??m BiCMOS process is presented in the paper. A novel sample-and-hold amplifier is used to improve sampling rate of the A/D converter, and the amount of input capacitors and equal resistor network is reduced by using an interpolating technique. Tri-input AND gate, latch and coding network are designed to overcome bubble and sparkle codes. Operating at 3.3V supply voltage, the A/D converter has a signal-to-noise ratio (SNR) of 47.3dB and it dissipates 561mW of power. ? 2006 IEEE.EI