VLSI Implementation of BCH Codec for NAND Flash Controller

随着大容量MP3播放器、PMP播放器、数码相机、智能手机等消费电子产品的需求持续增长,MLC的NAND闪存已经取代SLC的NAND闪存成为市场主流。而存储容量的增大所带来良率与可靠性的下降,意味着我们需要纠错能力更强大的硬件编译码器来处理可能发生的错误。针对固态硬盘需要支持多通道的NAND闪存,纠错编译码器也要有能够处理并行I/O总线的能力,本文实现了可由软件配置、最大纠错能力t为可变的1~16b的BCH纠错编译码器,在计算错误位置多项式的过程中使用了修正的欧几里德算法。Along with the increasing demand of mass storage in MP3 player, PMP player, Digital still camera, MLC NAND flash had replaced SLC NAND flash and become the main stream. The increasing storage capacity results in the decreasing of yield and reliability. It means that we need a powerful error correction hardwire codec to handle the possibility of error happened parallel processing for parallel vary from 1 to 16b which can The Error correction codec for multi-channel solid state disk need the capability to do I/O. In this paper, we implemented the BCH codec with the error correction capability t be configurable by software. A modified version of the Euclidean Algorithms that is specifically adapted to the RS decoding error location.0830-38,292