The Hardware Implementation of 8-Channel Flash Controller for Solid-State Disk Application

本文介绍一种基于MLC闪存和AHB总线的高速大容量数据控制系统的硬件实现方法，所提出的闪存控制器实现带8个8K字节缓冲器的高效率缓冲管理控制器来管理8个通道，每个通道可以连接8个闪存芯片。文中还介绍了快闪存储器存储单元的空白检查和交叉存取操作。实验结果证明该固态盘控制器的最高读速度为230．2MB／s，最高写速度为101．9MB／s．最后给出了控制器的综合结果和功耗分析，在24比特BCH纠错与一个通道的配置条件下，控制器的实现需要315K逻辑门。In this paper, we introduce a hardware implementation for mass storage data control system which is based on the MLC NAND flash and AHB interface. The proposed NAND flash controller implements a high efficiency buffer management controller to manage eight channels through eight 8k byte buffers. There are eight NAND flash chips can be connected by each channel. We also introduce the blanking check and interleaving operation for NAND flash device. The experimental result shows the max. throughput of the solid state disk controller is 230.2 MB/s for read mode and 101.9MB/s for write mode. Finally we provide the synthesis result and power analysis. It required 315K gate to implement the controller under the condition of one channel with 24bit ECC engine.0136-4