Formal symbolic verification using heuristic search and abstraction techniques

Computing devices are pervading our everyday life and imposing challenges for designersthat have the responsibility of producing reliable hardware and software systems. As systemsgrow in size and complexity, it becomes increasingly difficult to verify whether a design works asintended. Conventional verification methods, such as simulation and testing, exercise only partsof the system and from these parts, draw conclusions about the correctness of the total design.For complex designs, the parts of the system that can be verified are relatively small. Formalverification aims to overcome this problem. Instead of exercising the system, formal verificationbuilds mathematical models of designs and proves whether properties hold in these models. Indoing so, it at least aims to cover the complete design. Model checking is a formal verificationmethod that automatically verifies a model of a design, or generates diagnostic information ifthe model cannot be verified. It is because of this usability and level of automation that modelchecking has gained a high degree of success in verifying circuit designs.The major disadvantage of model checking is its poor scalability. This is due to its algorithmicnature: namely, every state of the model needs to be enumerated. In practice, properties ofinterest may not need the exhaustive enumeration of the model state space. Many propertiescan be verified (or falsified) by examining a small number of states. In such cases, exhaustivealgorithms can be replaced with search algorithms that are directed by heuristics. Methods basedon heuristics generally scale well.This thesis investigates non-exhaustive model checking algorithms and focuses on error detectionin system verification. The approach is based on a novel integration of symbolic model checking,heuristic search and abstraction techniques to produce a framework that we call abstractiondirectedmodel checking. There are 3 main components in this framework. First, binary decisiondiagrams (BDDs) and heuristic search are combined to develop a symbolic heuristic search algorithm.This algorithm is used to detect errors. Second, abstraction techniques are applied inan iterative way. In the initial phase, the model is abstracted, and this model is verified usingexhaustive algorithms. If a definitive verification result cannot be obtained, the same abstractionis re-used to generate a search heuristic. The heuristic in turn is used to direct a searchalgorithm that searches for error states in the concrete model. Third, a model transformationmechanism converts an arbitrary branching-time property to a reachability property. Essentially,this component allows this framework to be applied to a more general class of temporal property.By amalgamating these three components, the framework offers a new verification methodologythat speeds up error detection in formal verification. The current implementation of this frameworkindicates that it can outperform existing standard techniques both in run-time and memoryconsumption, and scales much better than conventional model checking