Se presenta el diseño de un filtro digital versátil, donde se pueda variar el orden y la longitud de la ventana de datos dentro del entorno de los Filtros Coseno, Seno y Fourier. El dispositivo será utilizado en la detección de señales de frecuencias bajas (50 Hz) enmascaradas en ruido, presentes en todo ensayo de maquinas o elementos eléctricos. En este trabajo se realiza el diseño con lógica programable sobre dispositivos comerciales, optimizando las características de cada filtro para los componentes utilizados y realizando pruebas de laboratorio para ver la calidad de filtro obtenido. Con este procedimiento se trata de obtener una Descripción del Hardware (HDL) que contenga la mayor cantidad de casos de utilización practica posible y a ...
Orientador : Normonds AlensDissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de ...
Projecte realitzat en el marc d’un programa de mobilitat amb la Université de Bourgogne[ANGLÈS] In t...
This paper presents the modeling, design and probe of a FPGA-based digital average filter. PLD-based...
The Field Programmable Gate Array (FPGA), were created in order to execute and implement projects r...
This article presents a different and simple methodology in the design and implementation of digital...
This article presents a different and simple methodology used in design and implementation of digita...
The aim of this project is to show how the way a specific design is mapped in a FPGA influences the ...
This paper presents the modeling, design and probe of a FPGA-based digital average filter. PLD-based...
This paper presents the modeling, design and probe of a FPGA-based digital average filter. PLD-based...
This article presents a different and simple methodology in the design and implementation of digital...
Resumo: Neste trabalho apresentamos uma síntese das características e das técnicas de projeto de fil...
Neste trabalho apresentamos uma síntese das características e das técnicas de projeto de filtros dig...
This article presents a different and simple methodology in the design and implementation of digital...
This article presents a different and simple methodology in the design and implementation of digital...
This article presents a different and simple methodology in the design and implementation of digital...
Orientador : Normonds AlensDissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de ...
Projecte realitzat en el marc d’un programa de mobilitat amb la Université de Bourgogne[ANGLÈS] In t...
This paper presents the modeling, design and probe of a FPGA-based digital average filter. PLD-based...
The Field Programmable Gate Array (FPGA), were created in order to execute and implement projects r...
This article presents a different and simple methodology in the design and implementation of digital...
This article presents a different and simple methodology used in design and implementation of digita...
The aim of this project is to show how the way a specific design is mapped in a FPGA influences the ...
This paper presents the modeling, design and probe of a FPGA-based digital average filter. PLD-based...
This paper presents the modeling, design and probe of a FPGA-based digital average filter. PLD-based...
This article presents a different and simple methodology in the design and implementation of digital...
Resumo: Neste trabalho apresentamos uma síntese das características e das técnicas de projeto de fil...
Neste trabalho apresentamos uma síntese das características e das técnicas de projeto de filtros dig...
This article presents a different and simple methodology in the design and implementation of digital...
This article presents a different and simple methodology in the design and implementation of digital...
This article presents a different and simple methodology in the design and implementation of digital...
Orientador : Normonds AlensDissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de ...
Projecte realitzat en el marc d’un programa de mobilitat amb la Université de Bourgogne[ANGLÈS] In t...
This paper presents the modeling, design and probe of a FPGA-based digital average filter. PLD-based...