Application of statistics to VLSI circuit manufacturing: test, diagnosis, and reliability

Semiconductor product manufacturing companies strive to deliver defect free, and reliable products to their customers. However, with the down-scaling of technology, increasing the throughput at every stage of semiconductor product manufacturing becomes a harder challenge. To avoid process-related test- escapes, the industry invests more and more in their process and test infrastructure. In order to maintain the product quality, and yet profit in their business, the semiconductor industries are looking for innovative ways that lower the product test costs, improve the test-diagnostic cycle, and capture latent failing products to ensure product reliability. This objective of the semiconductor product manufacturing companies can be stated as a yield management problem with constrains on the manufacturing and production test cost. With the semiconductor industries posting a clear goal as stated above, the problem to be solved was formulated as to find objective ways to maximize yield with no modifications to the product (e.g. design changes), least changes to the existing manufacturing infrastructure and no additional procurement of production test equipment (e.g. ATE). The chosen approach to address the problem was to use known advanced statistical methods to test–data, thus providing an opportunity to characterize and improve the quality of the tests. Improving the quality of the tests in terms of defective device classification earlier in the manufacturing stage not only reduces the test cost, but also provides a window of opportunity to correct for process defects earlier, and consequently a quicker yield ramp-up