Different types of bondwire interconnect for differential chip-to-antenna and single-ended chip-to-chip interfaces are investigated. Two differential compensation structures for various lengths of interconnects are designed and experimentally evaluated using dedicated transmit and receive radar modules operating across a 110-156 GHz band. Measurement results demonstrate that a fractional bandwidth of 7.5% and a minimum insertion loss of 0.2 dB can be achieved for differential interconnects as long as 0.8 mm. Design and measurement results of an extremely wideband low-loss single-ended chip-to-chip bondwire interconnect that features 1.5 dB bandwidth from DC to 170 GHz and insertion loss of less than 1 dB at 140 GHz are presented as well. Th...
In this contribution, two-conductor and coplanar bond wire configurations are modeled, analyzed and ...
International audienceThis contribution presents major intermediate results achieved towards the rea...
In order to carry out the complicated computation inside the high performance computing (HPC) system...
Connecting chips within a module is a basic requirement in transforming MMIC performance to system f...
We present the first comprehensive experimental characterization of bond wire interconnects at micro...
Bondwires at millimeter-wave frequencies show a high impedance mismatch that limits their applicatio...
In this contribution, the authors present a systematic approach for optimizing the RF performance of...
The performances of two different interconnection techniques for coplanar MMICs, wire bonding and fl...
Due to the multitude of advantages bond wire antennas have over conventional planar antennas (especi...
This paper presents the design of a bondwire antenna with detailed equations showing the derivation ...
This paper presents waveguide interconnects implemented in an embedded wafer level ball grid array (...
This work is a comprehensive experimental investigation of chip to package wirebond interconnects fo...
Abstract—In this paper we propose the usage of bond wires as antennas for chip-to-chip communication...
Wireless interconnects are an interesting alternative for conventional hard-wired solutions and have...
The scope of this work is the development of a 60 GHz flexible transceiver frontend by adopting an e...
In this contribution, two-conductor and coplanar bond wire configurations are modeled, analyzed and ...
International audienceThis contribution presents major intermediate results achieved towards the rea...
In order to carry out the complicated computation inside the high performance computing (HPC) system...
Connecting chips within a module is a basic requirement in transforming MMIC performance to system f...
We present the first comprehensive experimental characterization of bond wire interconnects at micro...
Bondwires at millimeter-wave frequencies show a high impedance mismatch that limits their applicatio...
In this contribution, the authors present a systematic approach for optimizing the RF performance of...
The performances of two different interconnection techniques for coplanar MMICs, wire bonding and fl...
Due to the multitude of advantages bond wire antennas have over conventional planar antennas (especi...
This paper presents the design of a bondwire antenna with detailed equations showing the derivation ...
This paper presents waveguide interconnects implemented in an embedded wafer level ball grid array (...
This work is a comprehensive experimental investigation of chip to package wirebond interconnects fo...
Abstract—In this paper we propose the usage of bond wires as antennas for chip-to-chip communication...
Wireless interconnects are an interesting alternative for conventional hard-wired solutions and have...
The scope of this work is the development of a 60 GHz flexible transceiver frontend by adopting an e...
In this contribution, two-conductor and coplanar bond wire configurations are modeled, analyzed and ...
International audienceThis contribution presents major intermediate results achieved towards the rea...
In order to carry out the complicated computation inside the high performance computing (HPC) system...