Design and Modeling of High-Frequency LDMOS Transistors

The lateral double-diffused MOS (LDMOS) transistor has traditionally been a high-voltage device used in switching applications. The use as a high-frequency device has become more important lately since the LDMOS offers an low cost solution for telecommunication applications. An important property of the LDMOS concept is that it can be manufactured in virtually the same process used in standard CMOS production. It only requires one extra process step, which is easily implemented. The other important aspect that gives the LDMOS the good high-frequency performance is that the channel length is a process parameter and not a lithography parameter. This thesis investigates the LDMOS transistor primarily from two aspects. The first is the high-voltage performance. For a high-voltage device the most important parameter is the breakdown voltage. The second most important parameter is the on-resistance that has the property of being in contradiction of the breakdown voltage and usually trade-offs are made to achieve acceptable performance. In the thesis several methods to improve the breakdown voltage/on-resistance relation are presented. The other part covers the high-frequency behavior of the LDMOS transistor. High-frequency characterization has been made to gain valuable information for the fundamental understanding of the physical mechanisms inside the transistor. A large part of the thesis covers modeling and parameter extraction of the devices. A new general method for parameter extraction of small-signal equivalent circuit models is presented, which has the appealing properties of not needing any approximation during the extraction which is common with other techniques