There is strong interest in the development of dynamically reconfigurable systems that can meet real-time constraints in energy/power-performance-accuracy (EPA/PPA). In this dissertation, I introduce a framework for implementing dynamically reconfigurable digital signal, image, and video processing systems. The basic idea is to first generate a collection of Pareto-optimal realizations in the EPA/PPA space. Dynamic EPA/PPA management is then achieved by selecting the Pareto-optimal implementations that can meet the real-time constraints. The systems are then demonstrated using Dynamic Partial Reconfiguration (DPR) and dynamic frequency control on FPGAs. The framework is demonstrated on: i) a dynamic pixel processor, ii) a dynamically r...
Processors for high-performance computing applications are generally designed with a focus on high c...
This paper presents a comparison of power-aware video decoding techniques that utilize dynamic volta...
DSP Application needs to speed-up in computation time can be achieved by assigning complex computati...
There is strong interest in the development of dynamically reconfigurable systems that can meet real...
In the current information booming era, image and video consumption is ubiquitous. The associated im...
Digital video processing demands have and will continue to grow at unprecedented rates. Growth comes...
In the current information booming era, image and video consumption is ubiquitous. The associated i...
This paper exhaustively explores the potential energy efficiency improvements of Dynamic and Partial...
In various real-time applications, such as Computer Graphics, Virtual Reality, System Control, Digit...
Both computational performances and energy efficiency are required for the development of any mobile...
Given the widespread use of real-time multitasking systems, there are tremendous optimization opport...
Adaptive hardware requires some reconfiguration capabilities. FPGAs with native dynamic partial reco...
Short time-to-market windows, high design and fabricationcosts, and fast changing standards of appli...
Both computational performances and energy efficiency are required for the development of any mobile...
Dynamic Partial Reconfiguration (DPR) can be a useful tool for maximizing FPGA performance while min...
Processors for high-performance computing applications are generally designed with a focus on high c...
This paper presents a comparison of power-aware video decoding techniques that utilize dynamic volta...
DSP Application needs to speed-up in computation time can be achieved by assigning complex computati...
There is strong interest in the development of dynamically reconfigurable systems that can meet real...
In the current information booming era, image and video consumption is ubiquitous. The associated im...
Digital video processing demands have and will continue to grow at unprecedented rates. Growth comes...
In the current information booming era, image and video consumption is ubiquitous. The associated i...
This paper exhaustively explores the potential energy efficiency improvements of Dynamic and Partial...
In various real-time applications, such as Computer Graphics, Virtual Reality, System Control, Digit...
Both computational performances and energy efficiency are required for the development of any mobile...
Given the widespread use of real-time multitasking systems, there are tremendous optimization opport...
Adaptive hardware requires some reconfiguration capabilities. FPGAs with native dynamic partial reco...
Short time-to-market windows, high design and fabricationcosts, and fast changing standards of appli...
Both computational performances and energy efficiency are required for the development of any mobile...
Dynamic Partial Reconfiguration (DPR) can be a useful tool for maximizing FPGA performance while min...
Processors for high-performance computing applications are generally designed with a focus on high c...
This paper presents a comparison of power-aware video decoding techniques that utilize dynamic volta...
DSP Application needs to speed-up in computation time can be achieved by assigning complex computati...