Architecture and development of synchronization control system for SNS particle accelerator

This thesis presents the design and implementation of the timing master device for the SNS (Spallation Neutron Source) particle accelerator located at the ORNL (Oak Ridge National Laboratory), which is currently the most powerful neutron source in the world. It is described why timing master device is a crucial device for the accelerator operation. Given is the functionality and implementation of the currently installed and used device, together with the descriptions of all its flaws which were fixed by designing and implementing a new and modern device. New timing master device is based entirely on the FPGA technology, where common principles and solutions used are provided in details. Trough the work, portions of the actual VHDL code used on the project describe the functionality of some of the crucial parts of the implementation. Challenges that were met trough the course of the implementation are described as well as their solutions. Final results describe the status of the project, where the device was successfully implemented and installed at the accelerator. Also provided are the new possibilities for additional work that emerged because of the successfully finished project