Deep level dopant compensated Czochralski silicon substrates for MMICs

The requirement for high resistivity single crystal silicon substrates for microwave monolithic integrated circuit (MMIC) applications above 1 GHz has been underlined in the ITRS Roadmaps, 2007 and 2009. We show that the resistivity of standard Czochralski silicon (Cz-Si) wafers can be enhanced from nominally 50 ?cm to approximately 15 k?cm, measured at about 20 oC using compensation by deep level (DL) impurity states of gold (Au), which was implanted into Cz-Si. We proposed a fully encapsulated Au-doped handle wafer for a SOI wafer configuration to solve the problem of Au contamination of the active wafer. The details have been discussed in our previous publications and a patent. In the present paper, we show significant reduction of RF attenuation in 1-40 GHz range in the DL-doped Si wafers, measured using co-planar waveguide (CPW) test structures fabricated on the material. Notably, the DL-doped wafers have a bi-layer resistivity profile. Our full 3D electromagnetic simulations using Ansys/Ansoft HFSS show significant enhancement of the quality (Q) factor of spiral inductors made on the material