Graphs showing the frequency of gates in a MUX circuit.

<p>(a) Weighted graph showing the frequency of gates used in the generation of evolved MUX circuits under DMC. The diameter of the nodes is proportional to the frequency of the gate. Links indicate that two gates have been wired together within a circuit. The weights provide a measure of how frequently a given pair has been used. Note the disproportionate frequency of N-implies () which are typically connected to NOT and AND gates, much less with NOR gates. Note also the vanishing frequency of NOR-NOR links (see text). In (b) we summarize the relative frequencies of different gates. The two N-Implies gates (here NI = N1+IN2) have been added together. These and the NOR abundances are highlighted with distinctive colours. Circuits were evolved imposing minimal number of wires.