The application of Dynamic Voltage Scaling (DVS) to reduce energy consumption may have a detrimental impact on the quality of manufacturing tests employed to detect permanent faults. This paper analyses the influence of different voltage/frequency settings on fault detection within a DVS application. In particular, the effect of supply voltage on different types of delay faults is considered. This paper presents a study of these problems with simulation results. We have demonstrated that the test application time increases as we reduce the test voltage. We have also shown that for newer technologies we do not have to go to very low voltage levels for delay fault testing. We conclude that it is necessary to test at more than one operating vo...
Today's very deep sub-micron technologies enable highly complex chip designs that operate at very hi...
Delay-fault monitoring sensors are widely used for Dynamic Voltage and Frequency Scaling (DVFS) to c...
Scan-based delay testing increases power consumption, particularly peak power, due to excessive simu...
The application of Dynamic Voltage Scaling (DVS) to reduce energy consumption may have a detrimental...
With the continued down-scaling of IC technology and increase in manufacturing process variations, i...
Multi Voltage Design (MVD) has been successfully applied in contemporary processors as a technique t...
Low-power consumption has become an important aspect of processors and systems design. Many techniqu...
Resistive open faults (ROFs) represent common manufacturing defects in IC interconnects and result i...
Abstract—Dynamic voltage scaling (DVS) has been widely adopted in multicore SoCs for reducing dynami...
Abstract—In this paper, we present a dynamic voltage scaling (DVS) technique called Razor which inco...
To meet the market demand, next generation of technology appears with increasing speed and performan...
Abstract—In this paper, we present a dynamic voltage scaling (DVS) technique called Razor which inco...
textThe Dynamic Voltage Scaling (DVS) technique has proven to be ideal in regard to balancing perfor...
Due to shrinking technology, increasing functional frequency and density, and reduced noise margins ...
Increasing integration and complexity in IC design provides challenges for manufacturing testing. Th...
Today's very deep sub-micron technologies enable highly complex chip designs that operate at very hi...
Delay-fault monitoring sensors are widely used for Dynamic Voltage and Frequency Scaling (DVFS) to c...
Scan-based delay testing increases power consumption, particularly peak power, due to excessive simu...
The application of Dynamic Voltage Scaling (DVS) to reduce energy consumption may have a detrimental...
With the continued down-scaling of IC technology and increase in manufacturing process variations, i...
Multi Voltage Design (MVD) has been successfully applied in contemporary processors as a technique t...
Low-power consumption has become an important aspect of processors and systems design. Many techniqu...
Resistive open faults (ROFs) represent common manufacturing defects in IC interconnects and result i...
Abstract—Dynamic voltage scaling (DVS) has been widely adopted in multicore SoCs for reducing dynami...
Abstract—In this paper, we present a dynamic voltage scaling (DVS) technique called Razor which inco...
To meet the market demand, next generation of technology appears with increasing speed and performan...
Abstract—In this paper, we present a dynamic voltage scaling (DVS) technique called Razor which inco...
textThe Dynamic Voltage Scaling (DVS) technique has proven to be ideal in regard to balancing perfor...
Due to shrinking technology, increasing functional frequency and density, and reduced noise margins ...
Increasing integration and complexity in IC design provides challenges for manufacturing testing. Th...
Today's very deep sub-micron technologies enable highly complex chip designs that operate at very hi...
Delay-fault monitoring sensors are widely used for Dynamic Voltage and Frequency Scaling (DVFS) to c...
Scan-based delay testing increases power consumption, particularly peak power, due to excessive simu...