Behavioural modelling of analogue faults in VHDL-AMS - A case study

Analogue fault simulation is needed to evaluate the quality of tests, but is very computationally intensive. Behavioural simulation is more abstract and thus faster than fault simulation. Using a phase-locked loop as a case study, we show how behavioural fault models can be derived from transistor-level fault simulations and that faulty behaviour can be accurately modeled