The effect of kernel operations on cache optimisations in a soft-core reconfigurable system is important for dynamic cache switching design. Considering kernel operations changes the subset of cache configurations that would be chosen for dynamic cache switching and also the decisions on when to cache switch. The results show that kernel operations can skew the effectiveness of application driven cache optimisations up to 20% over the original execution time. This skew is shown by mapping the performance of the applications both with and without kernel operations. The majority of the kernel operations is due to trap events generated by system calls like memory allocation or file reading. A cache configuration analysis methodology for fast s...
Dynamic reconfiguration techniques are widely used for efficient system optimization. Dynamic cache ...
Modern processors with an extensive cache structure are considered not to be useful in real-time sys...
This paper proposes an optimization by an alternative approach to memory mapping. Caches with low se...
The idea of changing cache attributes to suit an application has been explored for single programs. ...
This thesis presents dynamic cache switching - a framework developed for implementing configurable c...
Obtaining high performance without machine-specific tuning is an important goal of scientific applic...
The instruction cache is a popular target for optimizations of microprocessor-based systems because ...
A feature in modern operating systems is the ability to switch between programs so they appear to ru...
The ever-increasing gap between processor and memory speed is an issue also in embedded systems, bec...
International audienceAdapting a source code to the specificity of its host hardware represents one ...
International audienceAdapting a source code to the specificity of its host hardware represents one ...
International audienceThe introduction of caches inside high performance processors provides technic...
Block memory operations are frequently performed by the operating system and consume an increasing f...
In embedded systems caches are very precious for keeping low the memory bandwidth and to allow emplo...
Cache behavior is complex and inherently unstable, yet it is a critical factor affecting program per...
Dynamic reconfiguration techniques are widely used for efficient system optimization. Dynamic cache ...
Modern processors with an extensive cache structure are considered not to be useful in real-time sys...
This paper proposes an optimization by an alternative approach to memory mapping. Caches with low se...
The idea of changing cache attributes to suit an application has been explored for single programs. ...
This thesis presents dynamic cache switching - a framework developed for implementing configurable c...
Obtaining high performance without machine-specific tuning is an important goal of scientific applic...
The instruction cache is a popular target for optimizations of microprocessor-based systems because ...
A feature in modern operating systems is the ability to switch between programs so they appear to ru...
The ever-increasing gap between processor and memory speed is an issue also in embedded systems, bec...
International audienceAdapting a source code to the specificity of its host hardware represents one ...
International audienceAdapting a source code to the specificity of its host hardware represents one ...
International audienceThe introduction of caches inside high performance processors provides technic...
Block memory operations are frequently performed by the operating system and consume an increasing f...
In embedded systems caches are very precious for keeping low the memory bandwidth and to allow emplo...
Cache behavior is complex and inherently unstable, yet it is a critical factor affecting program per...
Dynamic reconfiguration techniques are widely used for efficient system optimization. Dynamic cache ...
Modern processors with an extensive cache structure are considered not to be useful in real-time sys...
This paper proposes an optimization by an alternative approach to memory mapping. Caches with low se...