Impact of ex-situ and in-situ cleans on the performance of bipolar transistors with low thermal budget in-situ phosphorus doped polysilicon emitter contacts

This paper investigates the effects of an in-situ hydrogen bake and an ex-situ HF etch prior to polysilicon deposition on the electrical characteristics of bipolar transistors fabricated with low thermal budget in-situ phosphorus doped polysilicon emitter contacts. Emitter contact deposition in an UHV-compatible LPCVD cluster tool is also compared with deposition in a LPCVD furnace. TEM and SIMS are used to characterise the emitter contact material and the interface structure and a comparison is made with Gummel plots and emitter resistances on bipolar transistors. The SIMS results show that an in-situ hydrogen bake in a cluster tool gives an extremely low oxygen dose at the interface of 6.3E13cm-2, compared with 7.7E14 and 2.9E15cm-2 for an ex-situ HF etch and deposition in a cluster tool or a LPCVD furnace respectively. TEM shows that the in-situ hydrogen bake results in single-crystal silicon with a high density of defects, including dislocations and twins. The ex-situ HF etch gives polycrystalline silicon for deposition in both a cluster tool and a LPCVD furnace. The single-crystal silicon emitter contact has an extremely low emitter resistance of 21ohm.µm2 in spite of the high defect density and the light emitter anneal of 30s at 900?C. This compares with emitter resistances of 151 and 260ohm.µm2 for the polycrystalline silicon contacts produced using an ex-situ HF etch and deposition in a cluster tool or a LPCVD furnace respectively. These values of emitter resistance correlate well with the interface oxygen doses and the structure of the interfacial oxide layer. The high defect density in the single-crystal silicon is considered to be due to the high concentration of phosphorus (>5E19 cm-3) in the as-deposited layers