We report the observation of an atomic like behavior from <i>T</i> = 4.2 K up to room temperature in n- and p-type Ω-gate silicon nanowire (NW) transistors. For that purpose, we modified the design of a NW transistor and introduced long spacers between the source/drain and the channel in order to separate the channel from the electrodes. The channel was made extremely small (3.4 nm in diameter with 10 nm gate length) with a thick gate oxide (7 nm) in order to enhance the Coulomb repulsion between carriers, which can be as large as 200 meV when surface roughness promotes charge confinement. Parasitic stochastic Coulomb blockade effect can be eliminated in our devices by choosing proper control voltages. Moreover, the quantum dot can be tuned...
The authors investigate the subthreshold behavior of triple-gate silicon field-effect transistors by...
Si nanowires have a multitude of potential applications including transistors, memories, photovolta...
Manipulation of carrier densities at the single electron level is inevitable in modern silicon based...
International audienceWe report the observation of an atomic like behavior from T = 4.2 K up to room...
Nanowire transistors are being investigated to solve short-channel effects in future CMOS technology...
The electrical characteristics of Si nanowire gated by an array of very closely spaced nanowire gate...
peer reviewedThe electrical characteristics of Si nanowire gated by an array of very closely spaced ...
[[abstract]]Ultrathin oxide-gated (thickness ~6 nm) point-contact junctions have been fabricated to...
Silicon nanowires have numerous potential applications, including transistors, memories, photovoltai...
We investigate the low-temperature transport in 8 nm diameter Si junctionless nanowire field-eff ec...
For the last two decades research on grown nanowires has been motivated by their potential applicati...
Silicon nanowires have potential uses in a wide range of devices and applications including transis...
The electrical characteristics of Si nanowire gated by an array of very closely spaced nanowire gate...
Random telegraph signal (RTS) noise is experimentally investigated in silicon nanowire transistors (...
Junction-less nanowire transistors are being investigated to solve short channel effects in future C...
The authors investigate the subthreshold behavior of triple-gate silicon field-effect transistors by...
Si nanowires have a multitude of potential applications including transistors, memories, photovolta...
Manipulation of carrier densities at the single electron level is inevitable in modern silicon based...
International audienceWe report the observation of an atomic like behavior from T = 4.2 K up to room...
Nanowire transistors are being investigated to solve short-channel effects in future CMOS technology...
The electrical characteristics of Si nanowire gated by an array of very closely spaced nanowire gate...
peer reviewedThe electrical characteristics of Si nanowire gated by an array of very closely spaced ...
[[abstract]]Ultrathin oxide-gated (thickness ~6 nm) point-contact junctions have been fabricated to...
Silicon nanowires have numerous potential applications, including transistors, memories, photovoltai...
We investigate the low-temperature transport in 8 nm diameter Si junctionless nanowire field-eff ec...
For the last two decades research on grown nanowires has been motivated by their potential applicati...
Silicon nanowires have potential uses in a wide range of devices and applications including transis...
The electrical characteristics of Si nanowire gated by an array of very closely spaced nanowire gate...
Random telegraph signal (RTS) noise is experimentally investigated in silicon nanowire transistors (...
Junction-less nanowire transistors are being investigated to solve short channel effects in future C...
The authors investigate the subthreshold behavior of triple-gate silicon field-effect transistors by...
Si nanowires have a multitude of potential applications including transistors, memories, photovolta...
Manipulation of carrier densities at the single electron level is inevitable in modern silicon based...