Co-Synthesis with Energy Minimisation for Heterogeneous Distributed Systems containing Power Managed Processing Elements

A co-synthesis system is presented, which partitions, schedules, and voltage scales multi-rate system specifications onto heterogeneous architectures containing dynamic voltage scalable processing elements (DVS-PEs). To achieve high degree of energy reduction, we formulate a generalised DVS problem, taken into account the power variations among the executing tasks. An efficient heuristic is presented, that identifies optimised supply voltages by not only "simply" exploiting slack time, as in previous research, but under the additional consideration of the PE power profiles. Thereby, this algorithm minimises the energy dissipation of heterogeneous architectures, including power managed PEs, effectively. Further, we address the DVS optimisation at different steps of the system synthesis, including allocation, mapping, and scheduling, by integrating the proposed heuristic into the design flow. We demonstrate how genetic list scheduling and mapping algorithms are adapted to the DVS problem to produce simultaneously high quality solutions in terms of energy dissipation and timing behaviour. We investigate and analyse the possible energy reductions at all steps of the co-synthesis, including the power variation effects. Extensive experiments and comparisons with recently proposed DVS techniques, which are included as sub-cases in our generalised DVS approach, indicate that the presented work has advantages in terms of solution quality