Test Quality Analysis and Improvement for an Embedded Asynchronous FIFO

NXP Semiconductors (formerly Philips Semiconductors) has created a new embedded asynchronous FIFO module. It is a small and fast full-custom design with Design-for-Test (DfT) functionality. The fault detection qualities of a proposed manufacturing test for this FIFO have been analyzed by a defect-based method based on analog simulation. Resistive bridges and opens of different sizes in the bit-cell matrix and in the asynchronous control have been investigated. The fault coverage for bridge defects in the bit-cell matrix of the initial FIFO test has been improved by inclusion of an additional data background and low-voltage testing. 100% fault coverage is reached for low resistance bridges. The fault coverage for opens has been improved by a new test procedure including waiting periods. 98.4% of the hard bridge defects in the asynchronous control slices can be detected with some modifications of the initial test