Stencil lithography is an innovative method for patterning that has a great flexibility from many points of view. It is based on shadow mask evaporation using thin silicon nitride membranes that allow the patterning of sub-100 nm features up to 100 μm in a single deposition. The stencil lithography does not require the coating or development of an organic resist and in addition the stencils can potentially be reused. This technique allows the use of contact or close proximity evaporations. These capabilities make stencil lithography an extremely flexible and clean technique. It can be used to evaporate a wide range of materials like metals, oxides, self-assembled monolayers, organic thin films, magnetic materials and in principle anything t...
The damage inflicted to silicon nanowires (Si NWs) during the HF vapor etch release poses a challeng...
Stencil lithography is used for patterning and connecting nanostructures with metallic microelectrod...
The damage inflicted to silicon nanowires (Si NWs) during the HF vapor etch release poses a challeng...
Stencil lithography is a surface patterning technique that relies on the local deposition of materia...
The endeavour to develop nanodevices demands for patterning methods in the nanoscale. To bring nanod...
Aluminum and gold nanowires were fabricated using 100 mm stencil wafers containing nanoslits fabrica...
We have fabricated new and robust nanostencil membranes for the surface patterning of 100-nm scale A...
Stencil lithography is a surface patterning technique that relies on the local deposition of materia...
This PhD thesis addresses two major issues: 1) Fabricating nanometer-scale patterns of functional ma...
We describe a sub-micron shadow-mask evaporation or nanostencil technique for single-layer material ...
This paper developed a facile nanofabrication approach at a 4-inch wafer level based on edge lithogr...
A tool and method for flexible and rapid surface patterning technique beyond lithography based on hi...
In this paper, we review the current development of stencil lithography for scalable micro- and nano...
The development of nanodevices demands for patterning methods in the nanoscale. To bring nanodevices...
In this paper, we review the current development of stencil lithography for scalable micro- and nano...
The damage inflicted to silicon nanowires (Si NWs) during the HF vapor etch release poses a challeng...
Stencil lithography is used for patterning and connecting nanostructures with metallic microelectrod...
The damage inflicted to silicon nanowires (Si NWs) during the HF vapor etch release poses a challeng...
Stencil lithography is a surface patterning technique that relies on the local deposition of materia...
The endeavour to develop nanodevices demands for patterning methods in the nanoscale. To bring nanod...
Aluminum and gold nanowires were fabricated using 100 mm stencil wafers containing nanoslits fabrica...
We have fabricated new and robust nanostencil membranes for the surface patterning of 100-nm scale A...
Stencil lithography is a surface patterning technique that relies on the local deposition of materia...
This PhD thesis addresses two major issues: 1) Fabricating nanometer-scale patterns of functional ma...
We describe a sub-micron shadow-mask evaporation or nanostencil technique for single-layer material ...
This paper developed a facile nanofabrication approach at a 4-inch wafer level based on edge lithogr...
A tool and method for flexible and rapid surface patterning technique beyond lithography based on hi...
In this paper, we review the current development of stencil lithography for scalable micro- and nano...
The development of nanodevices demands for patterning methods in the nanoscale. To bring nanodevices...
In this paper, we review the current development of stencil lithography for scalable micro- and nano...
The damage inflicted to silicon nanowires (Si NWs) during the HF vapor etch release poses a challeng...
Stencil lithography is used for patterning and connecting nanostructures with metallic microelectrod...
The damage inflicted to silicon nanowires (Si NWs) during the HF vapor etch release poses a challeng...