Fabrication, Characterization and Simulation of Graphene Field Effect Transistors operating at Microwave Frequencies

With the end of Si based Metal Oxide Semiconductor Field Effect Transistor scaling paradigm approaching fast as predicted by the Moore’s Law, and the technological advancements as well as human needs in many ways pushing for faster devices, graphene has emerged as a powerful alternative solution. This is so because of its very special properties like high charge carrier mobility, highly linear dispersion relation, high current carrying capacity and so on. However, since we have a finite resistance at Dirac point, the on/off ratio in graphene devices is sufficiently low, making graphene devices not so suitable for logical applications. At the same time, the 1/f noise, which is understood till now to originate from surface disorders like those observed in a two-dimensional electron gas system like graphene and is a major unwanted outcome in mesoscopic regime devices, reduces very much at high frequencies, making these devices good candidates for high frequency analogue applications. Motivated by these observations, this work explores fabrication and characterization of graphene field effect transistors operating at microwave frequencies, and compares a double gated device performance to a mono-gated device having the same geometry, dielectric layer thickness and gate length. A simple electrostatic finite element simulation model has also been developed to support our experimental observations by fitting simulated gate coupling capacitance values to the measured data. The model helps us in understanding the level of interface trap charge densities introduced into the device channel during fabrication, and the effect of quantum capacitance on device performance, and is in line with the experimental observations. Our results show that a double gated graphene FET has superior performance compared to a mono-gated FET