Due to the character of the original source materials and the nature of batch digitization, quality control issues may be present in this document. Please report any quality issues you encounter to digital@library.tamu.edu, referencing the URI of the item.Includes bibliographical references.Issued also on microfiche from Lange Micrographics.Parallel applications suffer from significant bus traffic due to the transfer of shared data. Large block sizes exploit locality and decrease the effective memory access time. It also has a tendency to group data together even though only a part of it is needed by any one processor. This is known as the false sharing problem. This research presents a dynamic sub-block coherence protocol which minimizes f...
Thesis (Ph. D.)--University of Washington, 1987Shared-memory multiprocessors offer increased computa...
Abstract. This paper provides a detailed investigation of latency penalties caused by repeated memor...
Coherence induced cache misses are an important aspect limiting the scalability of shared memory par...
Due to the character of the original source materials and the nature of batch digitization, quality ...
Parallel applications exhibit a wide variety of memory reference patterns. Designing a memory archit...
[[abstract]]A method of reducing false sharing in a shared memory system by enabling two caches to m...
The abstraction of a cache is useful to hide the vast difference in speed of computer processors and...
Directory-based cache coherence protocol is accepted as the common technique in large scale shared m...
We have developed compiler algorithms that analyze coarse-grained, explicitly parallel programs and ...
[[abstract]]A cache coherence protocol for a multiprocessor system. Each processor in the system has...
textThis dissertation explores techniques for reducing the costs of inter-processor communication i...
This thesis presents a new cache coherence protocol for shared bus multicache systems, and addresses...
Shared disks environment (SDE) refers to a distributed architecture for high performance transaction...
Abstract. Parallel graph reduction is a model for parallel program exe-cution in which shared-memory...
False sharing reduces system performance in distributed shared memory systems. A major impediment to...
Thesis (Ph. D.)--University of Washington, 1987Shared-memory multiprocessors offer increased computa...
Abstract. This paper provides a detailed investigation of latency penalties caused by repeated memor...
Coherence induced cache misses are an important aspect limiting the scalability of shared memory par...
Due to the character of the original source materials and the nature of batch digitization, quality ...
Parallel applications exhibit a wide variety of memory reference patterns. Designing a memory archit...
[[abstract]]A method of reducing false sharing in a shared memory system by enabling two caches to m...
The abstraction of a cache is useful to hide the vast difference in speed of computer processors and...
Directory-based cache coherence protocol is accepted as the common technique in large scale shared m...
We have developed compiler algorithms that analyze coarse-grained, explicitly parallel programs and ...
[[abstract]]A cache coherence protocol for a multiprocessor system. Each processor in the system has...
textThis dissertation explores techniques for reducing the costs of inter-processor communication i...
This thesis presents a new cache coherence protocol for shared bus multicache systems, and addresses...
Shared disks environment (SDE) refers to a distributed architecture for high performance transaction...
Abstract. Parallel graph reduction is a model for parallel program exe-cution in which shared-memory...
False sharing reduces system performance in distributed shared memory systems. A major impediment to...
Thesis (Ph. D.)--University of Washington, 1987Shared-memory multiprocessors offer increased computa...
Abstract. This paper provides a detailed investigation of latency penalties caused by repeated memor...
Coherence induced cache misses are an important aspect limiting the scalability of shared memory par...