Partitioning an arbitrary architecture

Due to the character of the original source materials and the nature of batch digitization, quality control issues may be present in this document. Please report any quality issues you encounter to digital@library.tamu.edu, referencing the URI of the item.Includes bibliographical references.In parallel computers, an efficient allocation strategy is one of the most important task to optimize system utilization. A good processor allocation strategy is the one that efficiently selects a subset of the system such that the selected subsystem is the best one in terms of processor utilization. In this thesis, a good way of partitioning an arbitrary multicomputer system architecture is developed. Mesh, debruijn and hypercube structures are tested. Kernighan-Lin heuristic is used for partitioning algorithm. Various partitioning schemes are tested. Results for 2 and 4 partitions are presented in this thesis. Communication capabilities among the processors in this thesis. Communication capabilities among the processors in a subset, (ICCB), is considered as the measure of performance. Standard deviation of ICCBs of the same level are considered as the measure of goodness of partitioning for regular and symmetric architectures. A concept of relative ICCB or RICCB is introduced to compare different architectures. It is concluded that 2 partition gives better results for mesh and bypercube while 4 partition gives better results for debruijn graph