Multi-standard interleaver architecture for high-speed turbo decoders

A turbo decoder consists of SISO blocks and interleaver. A parallel architecture for turbo decoder includes several SISO blocks that work in parallel. This means that also the interleaver must have a parallel architecture. Recent standards define a linear conflict-free interleaver for supporting parallel interleaving. In this work, we propose a multi-standard architecture for linear conflict-free (parallel) interleavers. Furthermore, we describe in detail an instantiation of the interleaver for three of the most important standards (UMTS LTE, Wimax and DVB-SH)