The F1nFET is a novel transistor that is fabricated using silicon on insulator (SOl) technology. The body of the transistor is etched out of the top layer of silicon. The device’s polysilicon source I drain are deposited. The gate is self-aligned to the source drain. Contact cuts are made and metal is etched and patterned. The devices did not show field effect as anticipated. Analysis suggested breakdown of the gate oxide
Abstract—In this paper, a novel device architecture called the fully depleted silicon-on-insulator f...
textAggressive scaling required to augment device performance has caused conventional electrode mate...
This paper presents a comprehensive study on the characteristics of n- and p-channel polycrystalline...
Crystalline silicon source/drain FInFET structures were designed, fabricated, and tested at the RIT ...
Abstract — A FinFET, a novel double-gate device structure is capable of scaling well into the nanoel...
We have proposed and fabricated a self-aligned polysilicon thin-film transistor (poly-Si TFT) with a...
The goal of this work is to develop the processes needed for the demonstration of a fully-depleted (...
In this paper, a novel tunnel field-effect transistor (TFET) has been demonstrated. The proposed TFE...
A Tn Gated Fin Field Effect Transistor is on of the many novel devices that may be replacing planar ...
Abstract—In this letter, a novel structure of the polycrystalline silicon thin-film transistors (TFT...
The electric characteristics of field-induced drain (FID) poly-Si thin-film transistors (poly-Si TFT...
This work presents the technological development and characterization of n-channel fully depleted hi...
A method to prepare metal-insulator-metal field-effect transistor (TFTs) is reported. The study fabr...
Currently, the established large area technology is amorphous silicon where device performance is sa...
Conventional polycrystalline silicon thin-film transistor (TFr) fabrication processes rely on an etc...
Abstract—In this paper, a novel device architecture called the fully depleted silicon-on-insulator f...
textAggressive scaling required to augment device performance has caused conventional electrode mate...
This paper presents a comprehensive study on the characteristics of n- and p-channel polycrystalline...
Crystalline silicon source/drain FInFET structures were designed, fabricated, and tested at the RIT ...
Abstract — A FinFET, a novel double-gate device structure is capable of scaling well into the nanoel...
We have proposed and fabricated a self-aligned polysilicon thin-film transistor (poly-Si TFT) with a...
The goal of this work is to develop the processes needed for the demonstration of a fully-depleted (...
In this paper, a novel tunnel field-effect transistor (TFET) has been demonstrated. The proposed TFE...
A Tn Gated Fin Field Effect Transistor is on of the many novel devices that may be replacing planar ...
Abstract—In this letter, a novel structure of the polycrystalline silicon thin-film transistors (TFT...
The electric characteristics of field-induced drain (FID) poly-Si thin-film transistors (poly-Si TFT...
This work presents the technological development and characterization of n-channel fully depleted hi...
A method to prepare metal-insulator-metal field-effect transistor (TFTs) is reported. The study fabr...
Currently, the established large area technology is amorphous silicon where device performance is sa...
Conventional polycrystalline silicon thin-film transistor (TFr) fabrication processes rely on an etc...
Abstract—In this paper, a novel device architecture called the fully depleted silicon-on-insulator f...
textAggressive scaling required to augment device performance has caused conventional electrode mate...
This paper presents a comprehensive study on the characteristics of n- and p-channel polycrystalline...