Fabrication of Nickel Nanodots for Application in Memory Devices

Non-volatile memory (NVM) technology is widely used for data storage applications and embedded systems. Flash memory has been the most popular kind of NVM owing to the high demand of portable electronic devices in the market. One way to implement NVM is by incorporating a floating gate in the device structure [...]. Nanodot based memory devices have gained a lot of importance recently due to their potential in overcoming the limitations of conventional conductive floating gate based memory devices. The presence of nanodots in the floating gate can provide the additional advantage of discrete storage of charge and overcome the limitations of the conventional NVM devices by allowing further scaling of the tunnel oxide. Each insulated nanocrystalline dot can trap and de-trap charges based on the applied gate voltage and hence cause a shift in the threshold voltage. Distributed storage of charge prevents the device from being vulnerable to fatal leakage owing to a single leakage path, enhancing its non-volatility and retention characteristics. Since the means of charge storage is now discrete, the devices are immune to stress induced leakage current [...]. This work proposes the study and comparison of fabrication techniques of Nickel nanodots (Ni-NDs). The project will thus contribute to a better understanding of nanostructure formation, in particular, comparing equilibrium and non-equilibrium processing environments. In order to prove the applicability of Ni-NDs for memory devices, some of the Ni-NDs structures produced will be implemented in a sandwich configuration to verify storage of electrical charges. In this sandwich configuration the Ni-NDs are in between two layers of SiO₂ which act as the control and tunnel oxide, respectively. The target size of the Ni-NDs is on the order of a few tens of nanometers. Although it is important to reduce the size of the nanodots considerably, it is equally important to integrate an adequate number of dots under the gate. The advantages that a nanostructured floating gate offers over the conventional floating gate can only be exploited if the nanodots obtained are within 10 nm [...]. Different approaches to Ni-NDs formation are investigated, namely, using plasma-based processes and thermal annealing. The tunnel and control oxides will be deposited by plasma sputtering and/or thermal growth. Variable angle spectroscopic ellipsometry (VASE) will be used to measure the thickness of the Ni/SiO₂ films and atomic force microscopy (AFM) to characterize the topography after the Ni-NDs formation. Aluminum contacts will be produced for conducting hysteresis loop measurements, followed by generation of capacitance-voltage (C-V) curves