A physics-based model of SiC-based MESFETs

Silicon Carbide (SiC) has been investigated as an alternative material to Silicon (Si) for enhancing the power-handling capability of semiconductor devices for simultaneous high-temperature and high frequency applications. Its high thermal conductivity, high bandgap, low permittivity, high saturation velocity, moderate mobility, material hardness and chemical inertness make it a prime candidate for power electronics, heat and light sensors, and MEMS applications. The MESFET is the most viable power transistor based on SiC. The performance of SiC MESFETs is limited by trapping and thermal effects. A physics-based analytical model of the SiC MESFET incorporating trapping and thermal effects is reported. The model takes into account the field and temperature dependencies of carrier transport parameters and carrier trapping effects. Both surface and substrate traps have been incorporated in the model to calculate the observed current slump in the I-V characteristics. The trapping and detrapping from surface traps control the channel opening at the drain end of the channel that requires the drain resistance to be gate and drain voltage dependent. The substrate traps capture channel electrons at high drain bias when the buffer layer is fully depleted resulting in current collapse at low drain bias in the following I-V trace. The detrapping of the captured electrons is initiated with the increasing drain bias and the channel electron concentration increases which is accelerated by increased thermal effects. As a result, restoration of collapsed drain current is obtained before the trapping effect is reinitiated at high drain bias. The calculated results using the current model are in good agreement with experimental data. A small-signal model for the MESFET has also been proposed. Calculations for the output conductance, the transconductance, the gate-source and gate-drain capacitance has also been presented