This paper presents a deterministic parallel algorithm to solve the data path allocation problem in high-level synthesis. The algorithm is driven by a motion equation that determines the neurons firing conditions based on the modified Hopfield neural network model of computation. The method formulates the allocation problem using the clique partitioning problem, an NP-complete problem, and handles multicycle functional units as well as structural pipelining. The algorithm has a running time complexity of O(1) for a circuit with n operations and c shared resources. A sequential simulator was implemented on a Linux Pentium PC under X-Windows. Several benchmark examples have been implemented and favorable design comparisons to other synthesis ...
Numerous problems can be modeled as clique partitioning problems in digital design synthesis. In thi...
The compilation of high-level programming languages for parallel machines faces two challenges: maxi...
The authors consider digital VLSI implementation of layered feedforward neural networks. The main go...
This paper presents a deterministic parallel algorithm to solve the data path allocation problem in ...
In recent years neural network have been shown to be quite effective in solving difficult combinator...
Abstract-The most creative step in synthesizing data paths executing software descriptions is the ha...
[[abstract]]The authors propose two heuristic procedures for the allocation problem in a data-path-s...
High level synthesis means going from an functional specification of a digits-system at the algorith...
This paper presents an evolutionary approach to solve the data path allocation problem in high-level...
Three parallel physical optimization algorithms for allocating irregular data to multicomputer nodes...
A technique for allocatzon and binding for data path synthesis (DPS) using a Genetic Algorithm (GA) ...
Various aspects of the two major tasks in high-level synthesis, scheduling and allocation, are studi...
This paper presents a model and a method for the allocation during the high level datapath synthesis...
The focus of this study is how we can efficiently implement the neural network backpropagation algor...
In most high-level synthesis systems, a hardware description language applicable for a wide range of...
Numerous problems can be modeled as clique partitioning problems in digital design synthesis. In thi...
The compilation of high-level programming languages for parallel machines faces two challenges: maxi...
The authors consider digital VLSI implementation of layered feedforward neural networks. The main go...
This paper presents a deterministic parallel algorithm to solve the data path allocation problem in ...
In recent years neural network have been shown to be quite effective in solving difficult combinator...
Abstract-The most creative step in synthesizing data paths executing software descriptions is the ha...
[[abstract]]The authors propose two heuristic procedures for the allocation problem in a data-path-s...
High level synthesis means going from an functional specification of a digits-system at the algorith...
This paper presents an evolutionary approach to solve the data path allocation problem in high-level...
Three parallel physical optimization algorithms for allocating irregular data to multicomputer nodes...
A technique for allocatzon and binding for data path synthesis (DPS) using a Genetic Algorithm (GA) ...
Various aspects of the two major tasks in high-level synthesis, scheduling and allocation, are studi...
This paper presents a model and a method for the allocation during the high level datapath synthesis...
The focus of this study is how we can efficiently implement the neural network backpropagation algor...
In most high-level synthesis systems, a hardware description language applicable for a wide range of...
Numerous problems can be modeled as clique partitioning problems in digital design synthesis. In thi...
The compilation of high-level programming languages for parallel machines faces two challenges: maxi...
The authors consider digital VLSI implementation of layered feedforward neural networks. The main go...