Studying on the read channel of high density optical storage system based on PRML

光存储技术作为主流存储技术之一，具有容量较大、成本低廉、体积小且携带方便等诸多优点，在影音娱乐、出版发行、数据备份等领域有着广泛的应用。随着HD-DVD和BD等第三代光存储数据存储格式的出现，光盘盘片信息密度迅速增大，光存储系统进入了高密度存储的时代，对相关领域的关键技术提出了更严格的要求。 高密度光存储系统的技术实现比较复杂，对各个组成单元的性能均有较高的要求。读出信道的处理是其中关键技术之一，其在一定程度上决定了高密度光存储系统的存储容量和数据重建能力。高密度光存储系统对盘片的物理格式进行了有效改进，进一步提高了信息符的密度，同时也使道间隔减小，这就要求读出信道具有更强的容错能力，可以有效消除由物理格式改变、外部干扰等引起的码间干扰。 本论文首先介绍了PRML（部分响应最大似然）技术的理论基础；其次详细阐述了高密度光存储信道建模、自适应均衡、数字插值时钟恢复等PRML技术的组成技术，讨论了各组成单元的技术实现方案并对各组成单元进行仿真测试；最后，本论文提出一种基于特定部分响应信道的Viterbi检测器设计架构和方法，并基于该架构和方法分别采用C语言和Verilog硬件描述语言设计实现了基于PR(12221) 的部分响应信道的Viterbi检测器（RLL（2,10） ）。As one of the main storage technologies, optical storage has lots of merits, such as large capacity, low-cost and convenience to transportation. Therefore, it is long-range implemented in many fields such as entertainment, publication and data backup. The information density of optical disc increases rapidly and channel spacing decreases with the coming of the Third-generation standards such as HD-DVD and BD. Meanwhile, it raised rigorous requirements in the related technical fields. The system of high density optical storage is complex and the performance of each component must meet the strict definition. Read channel’s processing is a key technology which could determine the capacity and the ability to reconstruct the data on the disc. The physical format of the system of high density optical storage is improved effectively with recording pit length and channel spacing decreasing. What’s more, the read channel should be more powerful in error correction to solve the problem of inter-symbol interface due to the changing of physical format. Firstly, the basic theory of Partial-Response Maximum-Likelihood (PRML) is introduced in this paper. Secondly, we elaborate the read channel modeling of the system of high density optical storage, adaptive equalizer and timing recovery with interpolation; discuss the technology implementation of each component and do the simulation test. Thirdly, a structure and a method to design the Viterbi detector based on specific partial response are discussed in this paper. Also, a Viterbi detector based on partial response (1 2 2 2 1) is implemented with C and Verilog