Fully Digital FPGA-Based Data Acquisition System for Dual Head PET Detectors

We present the development of a new fully digital, flexible, cost-efficient data acquisition system (DAQ) suitable for dual head Positron Emission Tomography (PET) scanners for small animal imaging applications. A free-running 12 bit octal channel Analog to Digital Converter (ADC), with 65 MHz sampling rate, was used for the digitization of the detector signals. The digitized data were fed into a Spartan 6 Field Programmable Gate Array (FPGA) for event processing. An embedded system was developed for the acquisition, using Xilinx's Embedded Development Kit (EDK) and Microblaze processor. A digital version of the Constant Fraction Discriminator (CFD) method was implemented in the FPGA, in order to achieve higher time resolution than the ADC sampling period, eliminating the need of an external mixed-signal device. The obtained information using FPGA includes: event timing, energy determination-discrimination, position determination and coincidence processing. The online processing of potential coincident events, significantly reduces the amount of data that will be transmitted to the computer. Coincident events are written temporarily to an external memory provided on a development board and are transferred to a Personal Computer (PC), via Ethernet link, for image reconstruction. Minimal post processing of the data is required prior to reconstruction. A small detector pair consisting of a BGO array coupled to a Position Sensitive Photomultiplier Tube (PSPMT) was used for the evaluation of the readout system. Obtained results prove that the proposed architecture can be used for the readout of dual head PET detectors for small animal imaging applications